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{{Use dmy dates|date=August 2018}}
{{Use Indian English|date=August 2018}}
{{Infobox Laboratory
|name = Advanced Numerical Research & Analysis Group
|motto =
|logo =
|image =
|established = 2 May 1988
|city = [[Hyderabad]], [[Telangana]]
|country = [[India]]
|research_field =
|type =
|director =
|staff =
|budget =
|operating_agency = [[DRDO]]
|affiliations =
|address = [[Kanchanbagh]], <br>Hyderabad-500 058
|telephone =
|campus =
|website = [https://www.drdo.gov.in/labs-establishment/contact-us/advanced-numerical-research-analysis-group-anurag ANURAG Home Page]
|footnotes =
}}

'''Advanced Numerical Research and Analysis Group''' ('''ANURAG''') was a laboratory of the [[Defence Research and Development Organisation]] (DRDO). Located in [[Kanchanbagh]], [[Hyderabad]], it was involved in the development of computing solutions for [[numerical analysis]] and their use in other DRDO projects.

== History ==

ANURAG was established on 2 May 1988, to development of indigenous supercomputer. Later in 1991, ANURAG became a part of defense R&D Organization.support aeronautical design work,<ref name="GlobalSecurity">[http://www.globalsecurity.org/wmd/world/india/hyderabad-drc-other.htm#anurag Defence Research Complex, Kanchanbagh, Hyderabad], GlobalSecurity.org report on ANURAG.</ref> with the mandate of executing specific, time-bound projects leading to the development of custom designed computing systems and software packages for numerical analysis and other applications.<ref>{{Cite web |url=http://drdo.gov.in/drdo/labs/ANURAG/English/index.jsp?pg=homebody.jsp |title=DRDO |access-date=20 February 2013 |archive-url=https://web.archive.org/web/20130328233718/http://drdo.gov.in/drdo/labs/ANURAG/English/index.jsp?pg=homebody.jsp |archive-date=28 March 2013 |url-status=dead |df=dmy-all }}</ref> As of 2020, it is not longer functional or act as an independent laboratory. All the staff members are transferred to others DRDO labs in Hyderabad, Bangalore and Delhi.<ref>{{Cite web|last=Mohan|first=Vijay|date=30 November 2020|title=DRDO shuts down 3 labs, sends staff to other centres|url=https://www.tribuneindia.com/news/nation/drdo-shuts-down-three-labs-sends-staff-to-other-centres-177986|access-date=2021-04-03|website=Tribuneindia News Service|language=en|archive-date=9 November 2022|archive-url=https://web.archive.org/web/20221109121110/https://www.tribuneindia.com/news/nation/drdo-shuts-down-three-labs-sends-staff-to-other-centres-177986|url-status=dead}}</ref>

== Areas of work ==

ANURAG helps design and develop advanced computing systems. Much of this research is conducted in state-of-the-art concepts like [[Parallel computing|parallel architectures]], etc., in order to build up a technology base in these areas. Its areas of work are:<ref>{{usurped|1=[https://web.archive.org/web/20071215010031/http://drdo.org/labs/electronics/anurag/areas.shtml ANURAG Home Page- Areas of work]}}</ref>

* [[Parallel computing|Parallel processing]] technology.
* Scientific Data Visualisation
* System engineering, integration.
* General purpose microprocessors.
* 1 [[micrometre]] CMOS fabrication technology.
* Design and development of [[VLSI]] chips & SOC development.
* Processor related technology.
* System software development for custom made processors.
* Analog, RF and Mixed-signal ASIC design

== Products ==

=== PACE ===

'''PACE (Processor for Aerodynamic Computations and Evaluation)''',<ref name="GlobalSecurity"/><ref name="achievements"/> developed by ANURAG, is a loosely coupled, message-passing [[Parallel computing|parallel processing]] [[supercomputer]]. PACE was originally designed to cater to the [[Computational Fluid Dynamics]] (CFD) needs in aircraft design. It can also be used for other fields such as [[weather forecasting]], automobile & civil engineering design, and [[Molecular Biology]]. These systems have been built using VME-bus based Pentium processor boards, ATM switches, and Reflective Memory communication hardware.

In 1987, India decided to launch a national initiative in supercomputing to design, develop and deliver a [[supercomputer]] in the [[gigaflop]]s range. Complementary projects were initiated in various labs, ANURAG being one of them. PACE was unveiled by then [[Prime Minister of India|Prime Minister]] [[P.V. Narasimha Rao]] in April 1995.{{citation needed|date=February 2016}}

In late 1998, ANURAG developed the 15 times more powerful '''"Pace Plus 32"''', which can be used to support missile development, as well as other fields. A 128-node '''PACE++''' system, built using Pentium processor-based VME boards was unveiled by Dr. [[A.P.J. Abdul Kalam]] in January 2004. The performance of this system is 50 Gigaflops (sustained performance). It has been installed at the [[Indian Institute of Science]], [[Bangalore]]. At present work is in progress on a parallel processing system based on Linux clusters targeted to deliver 1 [[teraflop]] performance.

=== ANAMICA ===

'''ANAMICA (ANURAG's Medical Imaging and Characterization Aid)'''<ref name="achievements">{{usurped|1=[https://web.archive.org/web/20071111201239/http://drdo.org/labs/electronics/anurag/achieve.shtml ANURAG Achievements]}}</ref> is a [[DICOM]] compliant three-dimensional medical visualization software for data obtained from any medical imaging system like [[MRI]], [[Computed tomography|CT]] and [[Medical ultrasonography|Ultrasound]]. The software has two-dimensional and three-dimensional visualization techniques to visualize the images in various ways. The sequence of images obtained from any imaging system by scanning of a single patient is packed to form a three-dimensional grid. The software has also been modified for accepting data from Industrial CT systems.

=== General purpose microprocessors ===

ANURAG has designed and developed general-purpose [[microprocessors]]- ANUPAMA and ABACUS. ANUPAMA is a 32-bit [[RISC]] processor, and works at 33  MHz clock speed. The complete software development tool kit is available for application development. A [[single-board computer]] based on ANUPAMA is available for evaluation and software development. ANUPAMA is also available as an IP core.

ABACUS is a 32-bit processor for multi-tasking applications with virtual memory support. It is designed around ANUPAMA core with additions like MMU, two levels of cache, double-precision FPU, SDRAM controller. The IP core of ABACUS is available in Verilog RTL code. This processor is suited for desktop applications. A complete software platform is available for the ABACUS processor and a single board computer with ABACUS is implemented. Linux Kernel is ported.

=== Other technologies ===

ANURAG has designed a 16-bit DSP processor, which is available as an IP core and the design is packaged in 120-pin CPGA. It has also designed other processors and arithmetic cores. ANURAG has also been able to fabricate [[CMOS]] designs up to 1-micrometer size and with up to 100,000 gates. Die sizes of 14 x 14  mm have been achieved.

== References ==
{{Reflist}}

== External links ==
* {{usurped|1=[https://web.archive.org/web/20071111201304/http://www.drdo.org/labs/electronics/anurag/index.shtml ANURAG Home Page]}}
* [http://www.globalsecurity.org/wmd/world/india/hyderabad-drc-other.htm#anurag Defence Research Complex, Kanchanbagh, Hyderabad], GlobalSecurity.org report on DRDO labs in Kanchanbagh, including ANURAG.

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{{DRDO Laboratories}}

{{DEFAULTSORT:Advanced Numerical Research And Analysis Group}}
[[Category: Defence Research and Development Organisation laboratories]]
[[Category: Research institutes in Hyderabad, India]]
[[Category:1988 establishments in Andhra Pradesh]]
[[Category:Research institutes established in 1988]]

Advanced Numerical Research and Analysis Group - Revision history

Surojits999 at 02:30, 25 October 2025